{"id":52121,"date":"2022-01-08T17:44:37","date_gmt":"2022-01-08T17:44:37","guid":{"rendered":"https:\/\/www.deberes.net\/tesis\/sin-categoria\/reduccion-de-interferencias-en-sistemas-multiprocesadores\/"},"modified":"2022-01-08T17:44:37","modified_gmt":"2022-01-08T17:44:37","slug":"reduccion-de-interferencias-en-sistemas-multiprocesadores","status":"publish","type":"post","link":"https:\/\/www.deberes.net\/tesis\/ciencias-tecnologicas\/reduccion-de-interferencias-en-sistemas-multiprocesadores\/","title":{"rendered":"Reduccion de interferencias en sistemas multiprocesadores"},"content":{"rendered":"<h2>Tesis doctoral de <strong> Jes\u00fas Jos\u00e9 Labarta Mancho <\/strong><\/h2>\n<p>Se analizan las causas de interferencia en sistemas multiprocesadores y desarrollamos tres grandes metodos de reduccion. En primer lugar se estudia la tecnica de memorias rapidas para reducir los dos aspectos de la interferencia: conflicto y degradacion. Se demuestra mediante simulacones y modelos la gran eficiencia que permite obtener esta tecnica asi como el interesante compromiso entre costo de la memoria y de la red a que da lugar. Un segundo tema consiste en presentar y analizar algoritmos de arbitraje para un sistema con memorias rapidad y para una red barajada. Demostramos con ello la importancia del arbitraje en la eficiencia del sistema.  finalmente proponemos dos estructuras de memoria cache para multiprocesadores: cache compartida con memorias rapidas y cache comun. Se analiza tambien el comportamiento de programas accediendo de forma alternada sobre una cache compartida.<\/p>\n<p>&nbsp;<\/p>\n<h3>Datos acad\u00e9micos de la tesis doctoral \u00ab<strong>Reduccion de interferencias en sistemas multiprocesadores<\/strong>\u00ab<\/h3>\n<ul>\n<li><strong>T\u00edtulo de la tesis:<\/strong>\u00a0 Reduccion de interferencias en sistemas multiprocesadores <\/li>\n<li><strong>Autor:<\/strong>\u00a0 Jes\u00fas Jos\u00e9 Labarta Mancho <\/li>\n<li><strong>Universidad:<\/strong>\u00a0 Polit\u00e9cnica de catalunya<\/li>\n<li><strong>Fecha de lectura de la tesis:<\/strong>\u00a0 01\/01\/1983<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<h3>Direcci\u00f3n y tribunal<\/h3>\n<ul>\n<li><strong>Director de la tesis<\/strong>\n<ul>\n<li>Mateo Valero Cort\u00e9s<\/li>\n<\/ul>\n<\/li>\n<li><strong>Tribunal<\/strong>\n<ul>\n<li>Presidente del tribunal: Joan Peracaola Roura <\/li>\n<li>Fernando Saez Vacas (vocal)<\/li>\n<li>Joan Figueras Panies (vocal)<\/li>\n<li>  (vocal)<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Tesis doctoral de Jes\u00fas Jos\u00e9 Labarta Mancho Se analizan las causas de interferencia en sistemas multiprocesadores y desarrollamos tres grandes [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"site-sidebar-layout":"default","site-content-layout":"","ast-site-content-layout":"","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"","ast-breadcrumbs-content":"","ast-featured-img":"","footer-sml-layout":"","theme-transparent-header-meta":"","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center 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