{"id":9586,"date":"1995-01-01T00:00:00","date_gmt":"1995-01-01T00:00:00","guid":{"rendered":"https:\/\/www.deberes.net\/tesis\/1995\/01\/01\/metodologia-de-diseno-de-controladores-logicos-sincronos-mediante-el-lenguaje-de-descripcion-hardware-vhdl\/"},"modified":"1995-01-01T00:00:00","modified_gmt":"1995-01-01T00:00:00","slug":"metodologia-de-diseno-de-controladores-logicos-sincronos-mediante-el-lenguaje-de-descripcion-hardware-vhdl","status":"publish","type":"post","link":"https:\/\/www.deberes.net\/tesis\/ciencias-tecnologicas\/metodologia-de-diseno-de-controladores-logicos-sincronos-mediante-el-lenguaje-de-descripcion-hardware-vhdl\/","title":{"rendered":"Metodolog\u00eda de dise\u00f1o de controladores logicos sincronos mediante el lenguaje de descripcion hardware vhdl."},"content":{"rendered":"<h2>Tesis doctoral de <strong> Enrique Soto Campos <\/strong><\/h2>\n<p>El proceso de la microelectronica ha propulsado el desarrollo de nuevos metodos de dise\u00f1o que facilitan la documentacion de un proyecto, el trabajo en equipo y todo lo relacionado con la conexion con herramientas de dise\u00f1o asistido por computador (cad). Estos metodos se basan en los lenguajes de descripcion hardware.  el objetivo de esta tesis es la obtencion de metodos sistematicos para la realizacion de controladores logicos sincronos mediante el lenguaje estandar ieee 1076-1993 vhdl. Siguiendo los pasos del metodo de dise\u00f1o \u00abtop-down\u00bb (arriba-abajo), se expone primeramente la forma de modelar los controladores logicos mediante el lenguaje de descripcion hardware vhdl tanto a un nivel de descripcion algoritmico como a nivel funcional. A continuacion se lleva a cabo la sintesis mediante herramientas cad comerciales, que a partir de la descripcion vhdl funcional proporcionan diversas realizaciones de controladores logicos en circuito integrado. Se desarrolla ademas una herramienta cad para computador personal (pc) que automatiza la sintesis de circuitos integrados a partir de una descripcion mediante redes de petri. Esta herramienta genera automaticamente a partir de las redes de petri las descripciones vhdl a nivel funcional. Por ultimo se apuntan diversas lineas de investigacion que este trabajo genera.<\/p>\n<p>&nbsp;<\/p>\n<h3>Datos acad\u00e9micos de la tesis doctoral \u00ab<strong>Metodolog\u00eda de dise\u00f1o de controladores logicos sincronos mediante el lenguaje de descripcion hardware vhdl.<\/strong>\u00ab<\/h3>\n<ul>\n<li><strong>T\u00edtulo de la tesis:<\/strong>\u00a0 Metodolog\u00eda de dise\u00f1o de controladores logicos sincronos mediante el lenguaje de descripcion hardware vhdl. <\/li>\n<li><strong>Autor:<\/strong>\u00a0 Enrique Soto Campos <\/li>\n<li><strong>Universidad:<\/strong>\u00a0 Vigo<\/li>\n<li><strong>Fecha de lectura de la tesis:<\/strong>\u00a0 01\/01\/1995<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<h3>Direcci\u00f3n y tribunal<\/h3>\n<ul>\n<li><strong>Director de la tesis<\/strong>\n<ul>\n<li> Perez Lopez Serafin Alfonso<\/li>\n<\/ul>\n<\/li>\n<li><strong>Tribunal<\/strong>\n<ul>\n<li>Presidente del tribunal: Enrique Mandado P\u00e9rez <\/li>\n<li> De Andr\u00e9s Rodriguez-trelles Francisco Jos\u00e9 (vocal)<\/li>\n<li>Juan Peracaula Roura (vocal)<\/li>\n<li> Del Rio Vazquez Alfredo (vocal)<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Tesis doctoral de Enrique Soto Campos El proceso de la microelectronica ha propulsado el desarrollo de nuevos metodos de dise\u00f1o [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"site-sidebar-layout":"default","site-content-layout":"","ast-site-content-layout":"","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"","ast-breadcrumbs-content":"","ast-featured-img":"","footer-sml-layout":"","theme-transparent-header-meta":"","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center 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